Research and implementation of the parallel CRC in USB 3.0 device

Abstract

Keywords:
• USB 3.0 device,
• cyclic redundancy check (CRC),
• parallel algorithm

References

1. [1]

   于工.信息与编码简明教程[M].北京:国防工业出版社,2007:67-80.
   

2. [2]

   蒋安平.循环冗余校验码(CRC)的硬件并行实现[J].微电子学与计算机,2007,24(2):107.
   

3. [3]

   常天海,胡鉴.基于FPGA的CRC并行算法研究与实现[J].微处理机,2010(2):45.
   

4. [4]

   程超,程善美.Unfolding算法实现的高速并行CRC电路的VLSI设计[J].微电子学与计算机,2002(12):68.
   

5. [5]

   Shukla S,Bergman N W.Signle bit error correction implementation in CRC-16 on FPGA[C]//Field Programmable Technology,Piscataway:The Institute of Electrical and Electronics Engineers,2004.

Proportional views